TTTC's Electronic Broadcasting Service

TTTC's Electronic Broadcasting Service

36th IEEE VLSI Test Symposium
(VTS 2018)
April 22 - 25, 2018
Hyatt Hotel, San Francisco, USA


CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information -- Committee
Scope
The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, debug and repair of microelectronic circuits and systems. Major topics include, but are not limited to: Analog/Mixed-Signal/RF Test ATPG & Compression Pre & Post Silicon Debug Automotive Test & Safety Built-In Self-Test (BIST) Defect & Current Based Test Defect/Fault Tolerance Delay & Performance Test Design for Resiliency Design for Testability (DFT) Design Verification/Validation Diagnosis and Debug Embedded System & Board Test Embedded Test Methods Emerging Technologies Test Reconfigurable System Test Fault Modeling and Simulation Hardware Security and Trust Low-Power IC Test Microsystems/MEMS/Sensors Test Memory Test and Repair On-Line Test & Error Correction Power/Thermal Issues in Test Reliability Evaluation System-on-Chip (SOC) Test Test Standards Test Economics Test of Biomedical Devices Test of High-Speed I/O Test Quality and Reliability Test Resource Partitioning Transients and Soft Errors 2.5D, 3D and SiP Test
Submissions	top
The VTS Program Committee invites original, unpublished Paper Submissions for VTS 2018. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required. Proposals for the Innovative Practices and Special Sessions tracks are also invited. The innovative practices track highlights cutting-edge challenges faced by test practitioners, and innovative solutions employed to address them. Special sessions can include invited presentations on hot topics, panels, embedded tutorials. Innovative practices and special session track proposals should include a title, name and contact information of the session organizer(s), a 150-to-200 word abstract, and a list of prospective participants. All submissions are to be made electronically through the VTS website. The deadline for all submissions is October 13, 2017. Detailed instructions for submissions will be found at the symposium website http://www.tttc-vts.org. Authors will be notified of the disposition of their papers by December 19, 2017. A submission will be considered as evidence that, upon acceptance, the author(s) will submit a final camera-ready version of the paper by February 09, 2018. Registration of at least one author by the camera-ready deadline and presentation of the paper at the symposium are also required for inclusion of the paper in the published proceedings. In the case of innovative practices and special sessions, the organizers commit to submitting a session title, abstract and list of participants for inclusion in the symposium proceedings. VTS 2018 will present a Best Paper Award, a Best Special Session Award, and a Best Innovative Practices Session Award based on the evaluations of reviewers, attendees, and an invited panel of judges. We also plan to organize various Student Activities including the TTTC Best Doctoral Thesis Contest and PhD Poster Forum, details for which will be made available through the VTS website. The Best Paper of VTS 2018 and the Best Innovative Practices presentation will be invited to resubmit to the IEEE Design & Test of Computers where they will undergo a regular, but expedited, review process. TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics will be offered in conjunction with VTS 2018. Tutorial proposals should be submitted according to TTEP 2018 submission guidelines, which will be posted on http://computer.org/tab/tttc/teg/ttep.
Key Dates	top
Submission deadline: October 13th, 2017 Notification of acceptance: December 19th, 2017 Camera ready deadline: February 09th, 2018
Additional Information	top
GENERAL CHAIR Chen-Huan Chiang Intel Inc. chen-huan.chiang@intel.com For submission-related information: PROGAM CO-CHAIRS Amit Majumdar Xilinx amit.majumdar@xilinx.com Mehdi Tahoori Karlsruhe Inst. of Tech. mehdi.tahoori@kit.edu
Committee	top
General Chair C.H. Chiang – Intel Program Co-Chairs A. Majumdar – Xilinx Mehdi Thoori – Karlsruhe Inst. of Tech. Past Chair Y. Makris – University of Texas at Dallas Vice-General Co-Chairs L. Anghel – TIMA Laboratory S. Ravi – Texas Instruments Vice-Program Co-Chairs S. Di Carlo – Politecnico di Torino S. Ozev – Arizona State University Innovative Practices Track Co-Chairs S. Natarajan – Intel P. Song – IBM Research Special Sessions Co-Chairs H. Stratigopoulos – LIP6 P. Sarson – AMS AG New Initiatives Co-Chairs R. Kapur – Synopsys X. Li – Chinese Academy of Sc. New Topics Co-Chairs B. Courtois – BC Consulting B. Kaminska – Simon Fraser University Corporate Support Co-Chairs A. Sinha – Intel V. Chickermane – Cadence Finance Chair J. Dworak – Southern Methodist University Registration Chair C. Patel – Univ. of Maryland Baltimore County Publications Chair: G. Di Natale – LIRMM Member: E. Vatajelu – Politecnico di Torino Publicity Co-Chairs M. Chao – NCTU Taiwan A. Savino – Politecnico di Torino Asian Initiative Chair K. Hatayama – Gunma University Student Activities Chair N. Karimi – University of Maryland, Baltimore County Local Arrangements Chair B. Eklow – Independent Audio/Visual Chair K. Huang – San Diego State University Ex-Officio Y. Zorian – Synopsys Program Committee: J. Abraham – University of Texas at Austin V. Agrawal – Auburn University C. Argyrides – AMD M. Barragan – TIMA Laboratory B. Becker – University of Freiburg R. Blanton – Carnegie Melon University J. Colburn – Nvidia J. Carulli – Global Foundries K. Chakrabarty – Duke University T. Chakrabarty – Qualcomm A. Chatterjee – Georgia Tech D. Chen – Iowa State Universit H. Chen – Mediatek K. Chung – Qualcomm C. Dixit – Broadcom D. Gizopoulos – University of Athens S. Gupta – University of Southern California I. Hartanto – Xilinx S. Hellebrand – University of Paderborn E. Larsson – Lund University H. Li – Chinese Academy of Sciences T.M. Mak – Independent S. Makar – H. Manhaeve – Ridgetop P. Maxwell – ON Semiconductor M. Michael – University of Cyprus S. Mir – TIMA Laboratory Z. Navabi – WPI A. Orailoglu – University of California, San Diego R. Parekhji – Texas Instruments J. Rajski – Mentor Graphics S. Reddy – University of Iowa M. Renovell – LIRMM M. Richetti – Synopsys S. Shoukourian – Synopsys O. Sinanoglu – NYU Abu Dhabi S. Sunter – Mentor Graphics M. Tehranipoor – University of Florida R. Tekumalla – Broadcom C. Thibeault – ETS Montreal L. C. Wang – University of California, Santa Barbara H.J. Wunderlich – University of Stuttgart Steering Committee M. Abadir – Abadir & Associates J. Figueras – Universidad Polytecnic de Catalunya A. Ivanov – University of British Columbia M. Nicolaidis – TIMA Laboratory P. Prinetto – Politecnico di Torino A. Singh – Auburn University P. Varma – Real Intent Y. Zorian – Synopsys
For more information, visit us on the web at: http://www.tttc-vts.org
VTS 2018 is sponsored by the Test Technology Technical Council (TTTC) of the IEEE Computer Society and the IEEE Philadelphia Section.

IEEE Computer Society-Test Technology Technical Council

TTTC CHAIR
Chen-Huan CHIANG
Intel - USA
E-mail chen-huan.chiang@intel.com

PAST CHAIR
Michael NICOLAIDIS
TIMA laboratory - France
E-mail michael.nicolaidis@imag.fr

TTTC 1ST VICE CHAIR
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

SECRETARY
Joan FIGUERAS
Un. Politec. de Catalunya - Spain
E-mail figueras@eel.upc.es

TEST WEEK COORDINATOR
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

TUTORIALS AND EDUCATION
Paolo BERNARDI
Politecnico di Torino - Italy
E-mail paolo.bernardi@polito.it

STANDARDS
Rohit KAPUR
Synopsys, Inc. - USA
E-mail rkapur@synopsys.com

EUROPE
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Giorgio DI NATALE
LIRMM - France
E-mail giorgio.dinatale@lirmm.fr

PRESIDENT OF BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

SENIOR PAST CHAIR
Adith SINGH
Auburn University â USA
E-mail adsingh@eng.auburn.edu

TTTC 2ND VICE CHAIR
Rohit KAPUR
Synopsys, Inc. â USA
E-mail rkapur@synopsys.com

FINANCE
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chen-huan.chiang@alcatel-lucent.com

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent - USA
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
NAIST - Japan
E-mail k-hatayama@is.naist.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
E-mail champac@inaoep.mx

NORTH AMERICA
André IVANOV
University of British Columbia - Canada
E-mail ivanov@ece.ubc.ca

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Synopsys, Inc. - USA
E-mail Yervant.Zorian@synopsys.com

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